Internal structure and subsystem responsibilities of the STC simulation engine.
Maintains the authoritative system state at each discrete timestep. State transitions are atomic and versioned.
Controls simulation progression using discrete timesteps. Supports accelerated, real-time, and paused execution modes.
Provides simplified physical relationships (energy conversion, resource loss) without high-fidelity overhead.
Handles discrete events: Module failure, resource depletion, and hazard triggers. Ensures deterministic reproducibility.